1. Field of the Invention
The present invention relates to native oxide removal that is done prior to a cobalt silicide formation on a semiconductor substrate. In particular, the present invention relates to native oxide removal by using a fluorinated plasma and by using nitride spacers on the substrate.
2. Description of the Related Art
Cobalt silicide formation is used for providing a good contact for source and drain regions within a silicon substrate. A cobalt silicide layer, which is a layer having good conductive properties, is formed above the source or drain regions, and an electrical contact is made to the source or drain regions by contacting the cobalt silicide layer. For complete cobalt (or nickel or titanium) silicide formation, the silicon surface must be free of oxide before the cobalt deposition. The cobalt silicide layer is formed on a polysilicon gate (or stack), in order to lower a resistance of the polysilicon (or `poly`), and it also is formed on exposed silicon regions of the substrate where source and drain regions are to be formed. The cobalt silicide layer forms a good contact to those source and drain regions, and also lower the resistance of a conductive path to those layers.
For a typical cobalt deposition process, the cobalt (or nickel or titanium) is deposited over the entire wafer. This provides cobalt on top of bare silicon areas that are source regions and drain regions. The cobalt is also provided over gate regions, or stacks, and over oxide materials, with those oxide materials being either sealed oxide or spacer materials which act as insulators.
Once the cobalt is deposited, the wafer is subjected to a rapid thermal anneal (RTA), where it is heated up. This reacts the cobalt with the exposed silicon, and cobalt silicide is formed as a result. In those areas of the wafer where cobalt is not in contact with silicon but rather is in contact with oxide (e.g., native oxide layer), either nothing happens or cobalt oxide is formed. Cobalt oxide is nonconducting.
Then, the wafer is subjected to a wet chemical process that strips off cobalt and cobalt oxide but does not strip off cobalt silicide. This results in the stripping off of excess cobalt in areas which are not in contact with the silicon, with those areas including areas where the cobalt was deposited on top of oxide. What is left is a cobalt silicide layer that exists over exposed silicon, where source and drain regions are to be (or have been) formed.
Then, the wafer is placed back into an RTA system, and taken to an even hotter temperature, so as to make the cobalt silicide have a proper grain structure to ensure good conductivity. Precise details of the environmental parameters and process times for each of these steps are known to those skilled in the art, and are not provided herein so as to more clearly describe the present invention, which deals with a process that is performed prior to the cobalt deposition step.
Prior to the cobalt deposition step, it is important that the areas in which cobalt silicide is to be formed, such as areas in which a source and a drain region are formed within a substrate, have exposed silicon on their top surfaces. Thus, a good clean step is required in order to provide for exposed silicon in particular areas of a substrate, since any oxide remaining in those areas will cause problems in the cobalt silicide formation process, as explained above.
A first conventional method for cleaning prior to cobalt deposition corresponds to a high-bias argon sputter etch, which is performed in-situ. FIG. 1 shows a wafer after it has been subjected to a high-bias argon sputter etch. In FIG. 1, gate region 110 and gate region 120 have gate oxide layers 130, 140, respectively, which form an insulating layer with respect to the substrate 100, where source and drain regions are formed within the substrate 100. After the high-bias argon sputter etch, which is typically performed with a 250 volt bias, damage is caused in the gate oxide layers 130, 140 as a result of using such a high bias voltage, even though the area 150 between the gate regions 110, 120 in which source and drain regions are formed (not shown) has been cleaned of any oxide, thereby leaving an exposed silicon surface that is desirable for a cobalt deposition step to be performed subsequently.
A second conventional method for cleaning prior to cobalt deposition corresponds to a low-bias argon sputter etch, which is performed in-situ. FIG. 2 shows a wafer after it has been subjected to a low-bias argon sputter etch. In FIG. 2, gate region 110 and gate region 120 have gate oxide layers 130, 140, respectively, which form an insulating layer with respect to a top surface of the substrate 100, where source and drain regions are formed within the substrate 100. After the low-bias argon sputter etch, which is typically performed with a 50 volt bias, the gate oxide layers 130, 140 are not damaged as in the first conventional method, but due to the low-bias voltage, the area 150 has redeposited oxide 160 formed thereon. The redeposited oxide 160 is formed from the spacers 185, 188 surrounding the gate regions 110, 120, whereby part of the spacers 185, 188 is sputtered off and ends up on top of the area 150. This is undesirable, since exposed silicon is not present on a portion of the substrate 100 where a source and a drain region are formed.
Thus, the first conventional method provides for a clean oxide-free substrate surface over source and drain areas so as to allow for proper cobalt silicide formation when cobalt is deposited onto the substrate, but at the expense of causing some damage to the gate oxide layers. The second conventional method does not damage the gate oxide layers, but also does not provide for a clean oxide-free substrate surface over the source and drain areas.
Therefore, a better process for preparing a substrate for a later-performed cobalt silicide formation process is desired.